Two types of array logic devices are presently commonly available on the market. The first and oldest device is the programmable array logic device. The second and more recent device, is the generic array logic device.
Programmable array logic devices provide a technique for design logic circuitry as well as for use in the manufacture of computers. However, they are very costly to produce, they have a high power consumption, and there is no uniformity among the enormous different types of devices presently on the market.
The generic array logic devices provide a great improvement over the programmable array logic devices. The generic array logic devices have similar logic configurations as the programmable array logic devices, but they present the several advantages thereover. One of the major advantages of the generic array logic devices is that they can be re-used and reprogrammed. The generic array logic devices use the CMOS technology, and therefore they have a lower power consumption. The generic array logic devices generally have a generic structure, thus enabling two generic array logic devices to duplicate about 44 different types of programmable array logic devices.
Both the programmable array logic devices and the generic array logic devices require programming equipment, generally known as programmers. The programmable array logic devices have been available for about ten years, and therefore the programmer support is quite extensive. There are at least a dozen programmable array logic programmer vendors. Due to the proliferation of programmable array logic device types, most programmers require some type of expensive adapter, so that the programmer can be retrofitted to handle new devices. Adapters are also required when the same device type (e.g., PAL16R4) from different manufacturers, have different programming specifications.
Newer programmable array logic programmers dispense with the use of adapters. They can be retrofitted to handle new devices by software upgrades. Programmable array logic programmers are very expensive, and generally cost thousands of dollars.
Programmable array logic programmers require device codes. To program a programmable array logic device, the operator first manually consults a chart that gives a device code for each of the programmable array logic types by manufacturer. The device code is entered into the programmer, usually by keying it into a front panel keyboard. This operation must be done before the programmer can do anything with a programmable array logic device.
Generic array logic devices are presently programmed with special adapters for existing programmable array logic programmers.
The only generic array logic programmer on the market is sold under the trade name Logic Lab from Programmable Logic Technologies. This unit consists of a programming box with a serial port. It requires connection to an IBM PC personal computer, or the like, for operation. The preliminary data sheet lists the supported devices as the GAL16V8, GAL20V8, ispGAL16Z8, ispGAL20Z8, and GAL39V18. The first two devices are the original generic array logic devices. The third and fourth devices are in system programmable versions (ISP). The GAL39V18 device is an advanced and yet unavailable generic array logic device.
It would therefore be desirable to have a logic array programmer which is capable of identifying the type of the programmable array logic device, without resorting to the manual identification of device code. The programmer should also be capable of programming a generic array logic device, using design file information derived from a programmable array logic JEDEC design file. A JEDEC file is defined as a map of all the fuses in the programmable array logic device, or of all the cells in the generic array logic device. JEDEC design files are the final result of logic compiler programs that allow the designer to enter logic designs in symbolic form, and then reduce these equations to the proper JEDEC file formats. The programmer should be capable of reading the generic array logic design file information, and programming a generic array logic device with such file information.
The programmer should also be very simple to use, and relatively inexpensive to manufacture. The programmer should be capable of displaying test vector information, and it should further indicate an error or mismatch in the test vectors. The programmer should enable the addition of unique identification information to the JEDEC file to be identified, or copied. The programmer should also be capable of transferring this unique identification information to the generic array logic device to be programmed. The programmer should display this unique identification information.